## Design a circuit "simulate" opening/closing a valve for a water tank

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lingyueqing
Posts: 1
Joined: Thu Feb 01, 2018 1:45 am

### Design a circuit "simulate" opening/closing a valve for a water tank

I need a circuit that can "simulate" opening/closing a valve for a water tank. The circuit has only 2 inputs, 'm' (minimum) and 'M' (Maximum), and an output 'V' (valve). The valve is only open if V= High(1). The tank has a floating water meter that goes up and down with the tank water level.

When the tank is emptying, as soon as the water meter reaches a certain level, minimum(m), the entry 'm' is Low and the valve should open to fill the tank. As soon as water meter reaches minimum(m) again in the rising direction, 'm' will become High but the Valve should remain open (=1). When the tank is filling, as soon as the water meter goes above a certain level Maximum(M), the entry 'M' is High and the valve should be closed. If the tank starts emptying again, 'M' will become Low but the valve should remain closed.

m=Low(0) and M=High(1) will never happen simultaniously.

I need to make two versions of this circuit: one using only NAND gates, and another using a NXP Flip-Flop:http://www.kynix.com/Detail/3254/74LVC1G79GV%2c125.html.

I tried using http://logic.ly/ for simulation purposes. One of the answers has a working NAND gate implementation, but I just can't wrap my head around the circuit with the JK flip-flop.

NAND gate schematic

bandtank
Posts: 15
Joined: Fri Mar 08, 2019 8:43 am

### Re: Design a circuit "simulate" opening/closing a valve for a water tank

I realize this post is very old, but I thought I'd answer it in case someone else has a similar question. It's a common situation for filling tanks.

You need to design a state machine to understand the logic before trying to implement a solution. It's very likely you will need to add more states and/or constraints after you dig into the problem. Start with this Karnaugh Map:

Code: Select all

``````m  M | V
-----|-----
0  0 | 1
1  0 | 1